050-7074 rev c 5-2006 maximum ratings all ratings: t c = 25c unless otherwise specified. caution: these devices are sensitive to electrostatic discharge. proper handling procedures should be followed. t-max ? g d s to-264 b2fll lfll apt8024b2fll apt8024lfll 800v 31a 0.260 ?? ?? ? lower input capacitance increased power dissipation lower miller capacitance easier to drive lower gate charge, qg popular t-max? or to-264 package fast recovery body diode power mos 7 ? is a new generation of low loss, high voltage, n-channel enhancement mode power mosfets. both conduction and switchinglosses are addressed with power mos 7 ? by significantly lowering r ds(on) and q g . power mos 7 ? combines lower conduction and switching losses along with exceptionally fast switching speeds inherent with apt'spatented metal gate structure. power mos 7 r fredfet characteristic / test conditionsdrain-source breakdown voltage (v gs = 0v, i d = 250a) drain-source on-state resistance 2 (v gs = 10v, i d = 15.5a) zero gate voltage drain current (v ds = 800v, v gs = 0v) zero gate voltage drain current (v ds = 640v, v gs = 0v, t c = 125c) gate-source leakage current (v gs = 30v, v ds = 0v) gate threshold voltage (v ds = v gs , i d = 2.5ma) symbol v dss i d i dm v gs v gsm p d t j ,t stg t l i ar e ar e as parameterdrain-source voltage continuous drain current @ t c = 25c pulsed drain current 1 gate-source voltage continuousgate-source voltage transient total power dissipation @ t c = 25c linear derating factoroperating and storage junction temperature range lead temperature: 0.063" from case for 10 sec. avalanche current 1 (repetitive and non-repetitive) repetitive avalanche energy 1 single pulse avalanche energy 4 unit volts amps volts watts w/c c amps mj static electrical characteristics symbol bv dss r ds(on) i dss i gss v gs(th) unit volts ohms ana volts min typ max 800 0.260 250 1000 100 35 apt8024b2_lfll 800 31 124 3040 565 4.52 -55 to 150 300 3150 2500 microsemi website - http://www.microsemi.com downloaded from: http:///
050-7074 rev c 5-2006 dynamic characteristics apt8024b2_lfll note: duty factor d = t 1 / t 2 peak t j = p dm x z jc + t c t 1 t 2 p dm single pulse z jc , thermal impedance (c/w) 10 -5 10 -4 10 -3 10 -2 10 -1 1.0 rectangular pulse duration (seconds) figure 1, maximum effective transient thermal impedance, junction-to-case vs pulse duration 0.250.20 0.15 0.10 0.05 0 0.5 0.1 0.3 0.7 d = 0.9 0.05 source-drain diode ratings and characteristics thermal characteristics characteristic / test conditionscontinuous source current (body diode) pulsed source current 1 (body diode) diode forward voltage 2 (v gs = 0v, i s = -31a) peak diode recovery dv / dt 5 reverse recovery time(i s = -31a, di / dt = 100a/s) reverse recovery charge(i s = -i d 31a, di / dt = 100a/s) peak recovery current(i s = -31a, di / dt = 100a/s) symbol i s i sm v sd dv / dt t rr q rr i rrm unit amps volts v/ns ns c amps min typ max 31 124 1.3 18 t j = 25c 300 t j = 125c 600 t j = 25c 2.0 t j = 125c 6.7 t j = 25c 13 t j = 125c 22 symbol r jc r ja min typ max 0.22 40 unitc/w characteristicjunction to case junction to ambient 1 repetitive rating: pulse width limited by maximum junction temperature 2 pulse test: pulse width < 380 s, duty cycle < 2% 3 see mil-std-750 method 3471 4 starting t j = +25c, l = 2.00mh, r g = 25 ? , peak i l = 31a 5 dv / dt numbers reflect the limitations of the test circuit rather than the device itself. i s - i d 31a di / dt 700a/s v r v dss t j 150 c 6 eon includes diode reverse recovery. see figures 18, 20. apt reserves the right to change, without notice, the specifications and information contained herein. symbol c iss c oss c rss q g q gs q gd t d(on) t r t d(off) t f e on e off e on e off characteristicinput capacitance output capacitance reverse transfer capacitance total gate charge 3 gate-source charge gate-drain ("miller ") charge turn-on delay time rise time turn-off delay time fall time turn-on switching energy 6 turn-off switching energyturn-on switching energy 6 turn-off switching energy test conditions v gs = 0v v ds = 25v f = 1 mhz v gs = 10v v dd = 400v i d = 31a @ 25c resistive switching v gs = 15v v dd = 400v i d = 31a @ 25c r g = 0.6 ? inductive switching @ 25c v dd = 533v, v gs = 15v i d = 31a, r g = 5 ? inductive switching @ 125c v dd = 533v v gs = 15v i d = 31a, r g = 5 ? min typ max 4670 860155 160 24 105 95 23 4 645525 1040 625 unit pf nc ns j downloaded from: http:///
050-7074 rev c 5-2006 apt8024b2_lfll typical performance curves r ds (on), drain-to-source on resistance i d , drain current (amperes) i d , drain current (amperes) (normalized) v gs (th), threshold voltage bv dss , drain-to-source breakdown r ds (on), drain-to-source on resistance i d , drain current (amperes) (normalized) voltage (normalized) 8070 60 50 40 30 20 10 0 1.401.30 1.20 1.10 1.00 0.90 0.80 1.15 1.10 1.05 1.00 0.95 0.90 1.21.1 1.0 0.9 0.8 0.7 0.6 5.5v 7.5v 6v 6.5v 7v v gs =15 &10 v 8v t j = +125c t j = +25c t j = -55c v ds > i d (on) x r ds (on)max. 250sec. pulse test @ <0.5 % duty cycle v gs =10v v gs =20v normalized to v gs = 10v @ 15.5a i d = 15.5a v gs = 10v v ds , drain-to-source voltage (volts) figure 2, transient thermal impedance model figure 3, low voltage output characteristics v gs , gate-to-source voltage (volts) i d , drain current (amperes) figure 4, transfer characteristics figure 5, r ds (on) vs drain current t c , case temperature (c) t j , junction temperature (c) figure 6, maximum drain current vs case temperature figure 7, breakdown voltage vs temperature t j , junction temperature (c) t c , case temperature (c) figure 8, on-resistance vs. temperature figure 9, threshold voltage vs temperature 0 5 10 15 20 25 30 024681 01 2 01 02 03 04 05 06 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150 100 8060 40 20 0 3530 25 20 15 10 50 2.52.0 1.5 1.0 0.5 0.0 0.0893 0.0842 0.0485 0.0103 0.106 0.0981 dissipated power (watts) t j (c) t c (c) z ext are the external thermal impedances: case to sink,sink to ambient, etc. set to zero when modeling only the case to junction. z ext downloaded from: http:///
050-7074 rev c 5-2006 apt8024b2_lfll e on e off v dd = 533v r g = 5 ? t j = 125c l = 100h e on includes diode reverse recovery. v ds , drain-to-source voltage (volts) v ds , drain-to-source voltage (volts) figure 10, maximum safe operating area figure 11, capacitance vs drain-to-source voltage q g , total gate charge (nc) v sd , source-to-drain voltage (volts) figure 12, gate charge vs gate-to-source voltage figure 13, source-drain diode forward voltage 20,00010,000 1,000 100200 100 10 1 v gs , gate-to-source voltage (volts) i d , drain current (amperes) i dr , reverse drain current (amperes) c, capacitance (pf) 1 10 100 800 0 10 20 30 40 50 0 50 100 150 200 250 0.3 0.5 0.7 0.9 1.1 1.3 1.5 127 5010 51 1612 84 0 10ms 1ms 100s t c =+25c t j =+150c single pulse operation here limited by r ds (on) v ds = 400v v ds = 160v v ds = 640v i d = 31a t j =+150c t j =+25c c rss c iss c oss i d (a) i d (a) figure 14, delay times vs current figure 15, rise and fall times vs current i d (a) r g , gate resistance (ohms) figure 16, switching energy vs current figure 17, switching energy vs. gate resistance v dd = 533v r g = 5 ? t j = 125c l = 100h t d(on) t d(off) e on e off t r t f switching energy ( j) t d(on) and t d(off) (ns) switching energy ( j) t r and t f (ns) 0 10 20 30 40 50 0 10 20 30 40 50 5101520253035404550 0 5101520253035404550 140120 100 8060 40 20 0 20001500 1000 500 0 8070 60 50 40 30 20 10 0 40003500 3000 2500 2000 1500 1000 500 0 v dd = 533v r g = 5 ? t j = 125c l = 100h v dd = 533v i d = 31a t j = 125c l = 100h e on includes diode reverse recovery. downloaded from: http:///
050-7074 rev c 5-2006 apt8024b2_lfll typical performance curves figure 18, turn-on switching waveforms and definitions figure 19, turn-off switching waveforms and definitions 90% t d(off) 10% t j = 125 c 90% t f switching energy gate voltage drain voltage drain current 0 5 % 10 % 5 % 10 % t d(on) 90% t r t j = 125 c drain current drain voltage gate voltage switching energy 15.49 (.610)16.26 (.640) 5.38 (.212)6.20 (.244) 4.50 (.177) max. 19.81 (.780)20.32 (.800) 20.80 (.819)21.46 (.845) 1.65 (.065)2.13 (.084) 1.01 (.040)1.40 (.055) 5.45 (.215) bsc 2.87 (.113)3.12 (.123) 4.69 (.185)5.31 (.209) 1.49 (.059) 2.49 (.098) 2.21 (.087)2.59 (.102) 0.40 (.016)0.79 (.031) drain source gate these dimensions are equal to the to-247 without the mounting hole. drain 2-plcs. 19.51 (.768)20.50 (.807) 19.81 (.780)21.39 (.842) 25.48 (1.003)26.49 (1.043) 2.29 (.090) 2.69 (.106) 0.76 (.030)1.30 (.051) 3.10 (.122) 3.48 (.137) 4.60 (.181)5.21 (.205) 1.80 (.071) 2.01 (.079) 2.59 (.102) 3.00 (.118) 0.48 (.019)0.84 (.033) drain source gate dimensions in millimeters and (inches) drain 2.29 (.090)2.69 (.106) 5.79 (.228)6.20 (.244) 2.79 (.110)3.18 (.125) 5.45 (.215) bsc 2-plcs. dimensions in millimeters and (inches) t-max tm (b2) package outline to-264 (l) package outline microsemis products are covered by one or more of u.s.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. us and foreign patents pending. all rights reserved. i d d.u.t. v ds figure 20, inductive switching test circuit v dd g apt30df60 downloaded from: http:///
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